CertiGuide to A+ (Core Hardware)  9  Chapter 0010:  CPUs

X  Chapter 0010: Test for Success Questions 1 Chapter 0011:  System Memory

1. Most Pentium CPUs require ____ voltage.

A. 12 Volts

B. 5 Volts

C. 3.3 Volts

D. 2 Volts

Explanation: Earlier Pentium chips required 3.3V of DC power. Later Pentium models reduced this need to 2.8 VDC.

2. True or False. The 80386 CPU was the first to include a math co processor.

A. True

B. False

Explanation: The first processor to include the math coprocessor in the CPU was the 80486DX. The 80386 required that a separate chip be installed for the math coprocessor.

3. The Pentium II included how many new instructions for MMX?

A. 57

B. 59

C. 74

D. No choice is correct

Explanation: The Pentium II came equipped with the same set of 57 instructions for MMX that the earlier Pentium MMX had.

4. Select the correct Processor requiring Slot 1:

A. Pentium

B. Pentium II

C. Xeon

D. Athlon

Explanation: The Pentium II was the first Intel processor that used a new Single Edge Connector (SEC), which had 247 pins. Being that it was the first, they called the slot it fit into Slot 1. How clever.

5. The Pentium IV uses which type of RAM?

A. SDRAM

B. DDR

C. EDO

D. RAMBUS (RDRAM)

Explanation: The Pentium IV currently uses only Rambus RDRAM. Future PIV chipsets may employ DDR-SDRAM.

6. The most versatile and popular Socket for the Pentium is a

A. Socket 5

B. Socket 6

C. Socket 7

D. Socket 8

Explanation: The Socket 7 ZIF socket is used by most of the Pentium model processors and the AMD K6 and K6-2 processors, making it one of the more versatile ZIF sockets to date.

7. Socket 370 is used for which processors?

A. Pentium

B. Athlon

C. M1

D. Celeron

Explanation: The Intel Celeron uses a Socket 370 ZIF socket.

8. The Duron can be found residing in a

A. Socket 7

B. Socket 462

C. Slot 2

D. Slot 1

Explanation: The AMD Duron and Thunderbird processors use Socket 462 ZIF sockets.

9. True / False. The Duron and the Thunderbird share the same Socket type.

A. True

B. False

Explanation: The Duron and Thunderbird both use Socket 462 ZIF sockets.

10. The difference between Slot 1 and Slot 2 is:

A. Slot 1 supports processor cache at full speed, Slot 2 supports cache at ½ speed.

B. Slot 1 supports cache at half processor speed, Slot 2 supports cache at full speed.

C. Slot 1 supports the Xeon, Slot 2 supports the Thunderbird

D. Slot 1 supports the Celeron, Slot 2 supports the Pentium II

Explanation: The Pentium II uses slot 1 and the Xeon uses Slot 2. Slot 1 supports L2 cache at half the processor speed, whereas Slot 2 allows L2 cache to operate at full processor speed.

11. Select the CPU types that support full processor speed with L2 cache.

A. Pentium II

B. Xeon

C. Pentium Pro

D. 80486

Explanation: The Xeon uses Slot 2, which allows L2 cache to operate at full processor speed.

12. The first socket to introduce a staggered pin array to prevent miss insertion was the:

A. Socket 1

B. Socket 3

C. Socket 4

D. Socket 7

Explanation: The Socket 4 ZIF socket was the first to use a Staggered Pin Grid Array (SPGA) to prevent incorrect insertion of the processor.

13. The AMD K-6 competed with Intel’s Pentium MMX with:

A. 3D Now

B. 3D Windows

C. Legal Challenges

D. No choice is correct

Explanation: The AMD K6 processor used 3D. Now technology in competition with Intel’s MMX technology.

14. True / False. The AMD K5 and K6 are socket and pin compatible with the Intel Pentium.

A. True

B. False

Explanation: In an effort to compete better with Intel, AMD used Socket 7 and Super Socket 7 ZIF sockets with their K5 and K6 processors.

15. The Pentium III introduced

A. MMX

B. 3D Future

C. MMX II

D. SIMD

Explanation: The Pentium III introduce Internet Streaming Single Instruction Multiple Data (SIMD). They are an additional set of 70 instructions specifically for streaming Internet content.

16. The acronym PGA is short for

A. Primary Gate Assembly

B. Pin Grid Array

C. Proprietary Gain Access

D. Pentium Grid Assembly

Explanation: PGA stands for Pin Grid Array. It describes the pin configuration found on the bottom of CPUs.

17. The maximum amount of Cache available within the CPU die of the Pentium Pro CPU was

A. 16 KB

B. 256 KB

C. 512 KB

D. 1 MB

Explanation: The Pentium Pro was available with up to 1MB of on-package cache.

18. Intel introduced Slot technology after Socket _____ .

A. 5

B. 6

C. 7

D. 8

Explanation: Slot 1 was introduced with the Pentium II, which came after the Pentium Pro. However, this technology was created in reaction to AMD using its Socket 7 technology for its K5 and K6 processors.

19. The core voltage for the Pentium 60 was _____ .

A. 12 Volts

B. 5 Volts

C. 3.3 Volts

D. < 2 Volts

Explanation: The Pentium 60 had a core voltage of 5VDC. Later models of the Pentium reduced this to 3.3VDC or less.

20. Socket 7 uses _____ pins

A. 321

B. 370

C. 462

D. 700

Explanation: Socket 7 has 321 pins.

X  Chapter 0010: Test for Success Questions 1 Chapter 0011:  System Memory