Hub architecture is a newer chipset design. While the basic structures of the Northbridge and Southbridge are essentially intact, the Northbridge is called the Memory Controller Hub (MCH) and the Southbridge is called the I/O Controller Hub (ICH). The prior design ran the Northbridge and Southbridge through PCI bus. The major change in Hub architecture is that the MCH and ICH are now routed through a dedicated hub interface.
Hub architecture improves the throughput speeds of the PCI bus as well as that of devices directly connected to the ICH including more modern ATA hard drive interfaces and USB interfaces. Now we will briefly cover bus transfer sizes. The PCI bus is 32 bits wide while the Hub transfer interface is only 8 bits wide. This seems like we are moving backwards but we actually are not. The PCI bus can transfer data along the 32-bit wide highway at one cycle per transfer at 33MHz for a total rate of 133 MB/sec. The hub interface transfers data on its 8-bit wide highway at four cycles per transfer at 66MHz for a total rate of 266 MB/sec. This represents a substantial improvement over the Northbridge/Southbridge chipset. This is also the reason why a newer motherboard and chipset using an older, slower CPU can sometimes outperform and older motherboard and chipset with a very fast CPU. If the transfer rate of the chipset is slower than the CPU, it bottlenecks processing and inhibits overall performance.
It would be virtually impossible to list and describe all the different chipsets that have been launched over two decades of history. Some of the more memorable are Neptune, Mercury, Triton I and Triton II. More often, chipsets were identified by names such as 420TX, 430HX and MVP3. The important thing to remember is that specific chipsets support specific technologies and limit to some degree the ability of a motherboard to be upgraded beyond a certain point. In addition, without a chipset, a motherboard is just a board; inert and lifeless.
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